16 research outputs found

    Design of a D-Band CMOS Amplifier Utilizing Coupled Slow-Wave Coplanar Waveguides

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    Development of wearable hardware platform to measure the ECG and EMG with IMU to detect motion artifacts

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    Weareable biomedical devices make it possible to monitor physiological parameters of human beings where physical fitness is critical for their work. However, the motion artifacts corrupt the ambulatory measurements of electrophysiological parameters and it is necessary to detect and eliminate these motion artifacts. The long term measurement and analysis of health parameters require enormous data processing and storage resources on board. It is also challenging to perform sensor fusion of multiple devices and to manage multiple communication channels. This paper describes the development of a wearable hardware platform to measure electrocardiogram (ECG) and electromyogram (EMG) with an additional IMU sensor to detect the motion artifacts. Bringing all the sensors on single platform resolves the sensor fusion problems. The measurements are digitized and sent wirelessly through a bluetooth interface to a remote unit in real-time. Which is capable for the implementation of extensive processing and analysis algorithms to detect the motion artifacts and extract The features of ECG and EMG waveform structures.Peer reviewe

    Temperature Compensation of Crystal References in NB-IoT Modems

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    The low-cost nature of NB-IoT modems encourages them to deploy uncompensated crystal oscillators (XOs) as frequency references. The frequency offset of an uncompensated XO, however, makes network acquisition inefficient under low network coverage. In the worst case, the bulk of an NB-IoT modem's power is consumed in network acquisition. This work demonstrates a discrete frequency synthesizer prototype that employs its phase-locked loop to compensate for the frequency offset of its reference XO. We propose an accurate crystal model and a compensation logic that are suitable for 32-bit microprocessors, commonly available in NB-IoT modems. Alternatively, when synthesized in a commercial 65-nm process in 24-bit precision, the proposed compensation logic is simulated to require a total area of 0.029 mm2 and power of 290 nW at a refresh rate of 1.4 kHz. Moreover, the XO model requires only 0.16 kB of RAM. The prototype achieves a compensation error level of down to 27 ppb (3Σ) over the temperature range from-40 to 85 °C. The dominant error sources of the prototype are discussed in detail. In addition, we show that an NB-IoT modem can use the information acquired from sequential network acquisitions to compose and update its XO model in the field. This support for field calibration removes the need for XO characterization in production and ensures the validity of the model over the NB-IoT modem's lifespan. The prototype achieves a compensation error level of down to 50 ppb (3Σ) in an emulated in-field calibration test, sufficient to ensure energy-efficient low-latency network acquisition under low network coverage.Peer reviewe

    A 53-117 GHz LNA in 28-nm FDSOI CMOS

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    250 GHz SiGe SPDT Resonator Switch

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    250 GHz SiGe SPDT Resonator Switch

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    Design of an E-band Doherty Power amplifier

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    Design and analysis of an e-band power detector in 0.13 µm SiGe BiCMOS technology

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    Funding Information: The authors would like to thank the Academy of Finland for supporting this work through MilliRAD project. The work of M. Varonen was supported through the Academy of Finland Research Fellow project MIDERI (decision no 310234). Publisher Copyright: © 2020 IEEEThis paper presents a high dynamic range E-band power detector in a 0.13 µm SiGe BiCMOS technology. In this design the Meyer topology using bipolar transistor is adopted and implemented for E-band operation. The measured detector achieves a dynamic range of 35 dB from -25 dBm to +10 dBm. It shows less than 1.6 dB offset in input power detection from 72 GHz to 82 GHz. This power detector consumes 0.6 mW of DC power and the occupied core area is 0.1 mm2Peer reviewe

    Design of a 240-GHz LNA in 0.13 µm SiGe BiCMOS Technology

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    Design of a 240-GHz LNA in 0.13 µm SiGe BiCMOS Technology

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